Inovation
Revolutionizing Large-Area Electronics: Scientists Break Record in Stackable Semiconductor Transistors
Researchers at King Abdullah University of Science and Technology (KAUST) in Saudi Arabia have achieved a groundbreaking milestone in microchip design by developing the first six-stack hybrid CMOS for large-area electronics. This achievement, surpassing any previously reported hybrid CMOS designs with only two stacks, sets a new standard in integration density and efficiency. The breakthrough opens up new possibilities in electronic miniaturization and performance enhancements.
Their research has been published in Nature Electronics.
CMOS microchips are ubiquitous in various electronic devices, from smartphones and TVs to satellites and medical equipment. Hybrid CMOS microchips offer significant advantages for large-area electronics. As electronic miniaturization becomes increasingly important for flexible electronics, smart health devices, and the Internet of Things, current design methodologies are reaching their limits.
Lead researcher Associate Professor Xiaohang Li from KAUST’s Advanced Semiconductor Laboratory explained, “To continue advancing, we must look beyond planar scaling and explore solutions like stacking transistors vertically.”
Traditional microchip fabrication processes involve high temperatures that can damage lower layers as new ones are added. The KAUST team’s innovative approach ensured that no fabrication step exceeded 150°C, with most steps completed at room temperature.
Surface smoothness is crucial for optimal performance, and the team made significant improvements to keep the layers smoother than previous processes. Proper alignment of layers is essential for vertical stacking, and the scientists enhanced the fabrication process to achieve optimal connections.
Postdoctoral researcher Saravanan Yuvaraja, the first author of the research paper, stated, “In microchip design, the goal is to pack more power into less space. By refining multiple fabrication steps, we have laid the groundwork for vertical scaling and significantly increasing functional density beyond current limits.” Contributions to the study were also made by Professor Martin Heeney and Adjunct Professor Thomas Anthopoulos from KAUST.
Citation:
Scientists set a new record by stacking semiconductor transistors for large-area electronics (2025, October 17)
retrieved 17 October 2025
from https://techxplore.com/news/2025-10-scientists-stacking-semiconductor-transistors-large.html
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